*********************************************
....Publication List of Yoshiaki Hagiwara....
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Evidence_that_Hagiwara_at_Sony_invented_Pinned_Buried_Photodiode_in_1975.pdf
EDTM2020_Paper_on_the P+PN+P Junction Pinned Photodiode and Schottky Barrier Photodiode (html)
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Please write me at hagiwara-yoshiaki@aiplab.com
Return to http://www.aiplab.com/
*********************************************

Yoshiaki_Hagiwara_Bio.pdf

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http://www.icecet.com/home

http://www.icecet.com/ICECET_Program.pdf

ICECET2021_Session_E-III_chaired_by_Yoshiaki_Hagiwara.pdf





ICECET2021_Program_Session_E-III.pdf

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The presentation slides, pdf, mp3 audio and mp4 video files

of my papers 061 and 075 are now all uploaded into:

ICECET2021_Paper61_html

ICECET2021_Paper75_html

held at the IEEE ICECET2021 conference

in Cape Town, South Afrrica on Dec 9 and 10, 2021.

http://www.icecet.com/home

http://www.icecet.com/ICECET_Program.pdf

ICECET2021_Session_E-III_chaired_by_Yoshiaki_Hagiwara.pdf

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001A_ICECET2021_Paper061_Pinned Buried PIN Photodiode type Solar Cell.pdf

001B_ICECET2021_acceptance_letter_ID_061.pdf

001C_ICECET 2021_PARTICIPATION_CERTIFICATE_061.pdf

001D_ICECET2021_Paper061_supplement_Process_Flow_of_Pinned_Buried_PIN_Photodiode_type_Solar_Cell_2021_08_14.pdf

002A_ICECET2021_Paper075_Invention and Historical Development Efforts of Pinned Buried Photodiode.pdf

002B_ICECET2021_acceptance_letter_ID_075.pdf

002C_ICECET 2021 PARTICIPATION CERTIFICATE_075.pdf

002D_ICECET2021_Paper075_supplement_The_Evidence_that_Hagiwar_at_Sony_invente_Pinne_Burie_Photodiode_in_1975.pdf

003_ICECET2021_CHAIR_CERTIFICATE_Session_E3.pdf

004_ICECET2001_Session_E-III_Chaired_by_Yoshiaki_Hagiwara.pdf

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A Japanese Newspaper by Sangyou Times

   wrote an aticle on Hagiwara Profile.

      on Nov 13, 2020

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https://www.sangyo-times.jp/article.aspx?ID=5331

Sangyo-Times.jp/article_ID=5331_(PDF)

Sangyo-Times.jp/article_ID=5331_(html)

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Pinned_Buried_Photodiode_with_Electrical_Shutter_Function.pdf

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(P001)April 1973

"The Influence of Interface States on Incomplete Charge Transfer in Overlapping Gate Charge Coupled Devices"

IEEE Journal of Solid State Circuits,Vol. SC 8, No.2, April 1973


(P002)February 1974

"Charge Transfer of Buried Channel Charge Coupled Devices"

Proceeding of International Solid State Circuit Conference

(ISSCC1974),San Francisco, February 1974.


(P003)April 1974

"Final Stage of the Charge Transfer Process in Charge Coupled Devices"

IEEE Transactions on Electron Devices, Vol. ED-21, No.4, April 1974


(P004)June 1975

Caltech_1975_PhD_Thesis_by_Yoshiaki_Daimon_Hagihara.pdf

in Electrical Engineering (major) and Physics(minor), June 1975,

California Institute of Technology, Pasadena, California USA.


(P005) October 23,1975

Japanese Patent Application JPA1975-127646

on "Back-light Triple Junction Type Pinned Buried Photodiode

with Complete Charge Transfer Capability and Global Shutter Fucntion",

Japanese PAtent Application written in Japanese, filed on Oct 23, 1975


(P006)October 23,1975

Japanese Patent Application JPA1975-127647

on "Back-light Double Junction Type Pinned Buried Photodiode

with Complete Charge Transfer Capability and Global Shutter Function",

Japanese Patent Application written in Japanese, filed on Oct 23, 1975


(P007) November 10 1975

Japanese Patent Application JPA1975-134985

on "Triple Junction Type Pinned Buried Photodiode

with Complete Charge Transfer Capability and

Vertical Overflow Drain Function",Japanese Patent Application

written in Japanese, filed on Nov 10, 1975.


(P008) September 1976

"128-Bit Multi Comparator"

IEEE Journal of Solid State Circuits, VOL.SC11, No.4, October 1976.


(P009) September 1977

P1977_Narrow_Cahnnel_Transfer_Gate_CCD_SSDM1977_Paper_by_Hagiwara.pdf"

Proceeding of the 9th Conference on Solid State Devices,Tokyo, September 1977


(P010) September 1977

Japanese Patent Application JPA1977-126885

on "Electric Shutter Clocking and Gamma Control Scheme

using Overflow Drain (OFD) controlled by Strong Punch Thru OFD Voltage Control",

Japanese Patent Application written in Japanese,filed on Sep 29, 1977


(P011) September 1978

Hagiwara_SSDM1978_Paper_on_Pinned_Buried_Photodiode.pdf

Proceeding of the 10th Conference on Solid State Devices,Tokyo, September 1978.


(P012) September 1979

"ADVANCES in CCD Imager " Technical Digest of IEEE International Conference

of CCD Image Sensors (IEEE CCD'79),Edinburgh, Scotland UK, September 1979.


(P013) May 1980

IEEE ECS1980 invited paper on "A CCD color imager with narrow-channel transfer gates"

Proceeding of the 157th Electrochemical Society Meeting, May 11-16, 1980, St. Luis, USA.


(P014) November 1980

Technology Book on "CCD Image Sensor and Applications" Trickeps Press, November 1980.


(P015) October 1989

"A 25-ns 4-Mbit CMOS SRAM with Dynamic Bit-Line Loads"

IEEE Journal of Solid State Circuits, vol.24, no.5, October 1989.


(P016) December 1996

IEEE1996_Review_Paper_on_Sony_1980_One_Chip_FT_CCD_Image_Sensor

with_Pinned_Buried_Photodiode


IEEE Transaction on electron Devices, VOl.43, No.12, Dec 1996.


(P017) November 1997

"Sony Semiconductor History"

Addressed at the 23th Research Seminar

in Tokyo Communication University, Nov 28, 1997.


(P018) November 1998

"DRAM/SRAM Technology and Problem.pdf"

Proceedings of the Institute of Electrostatics Japan,

127 Vol. 22 No. 6, 1998, pp.177-178.


(P019) September 2001

"Micro-Electronics for Home Entertainment"

an invited ESSCIRC2001 Plenary Talk,

Technical Digest of IEEE ESSCIRC2001 International Conference (ESSCIRC2001),

Villach, Austria, September, 2001.


(P020) December 2004

Turorial Short Cource on Image Sesnors by Yoshiaki Hagiwara.pdf

IEEE IEDM2004 Conference Short Course at IEDM2004 Short Course, December 2004.


(P021) September 2008

"SOI Design in Cell Processor and Beyond"

an invited ESSCIRC2008 Plenary Talk,

Technical Digest of IEEE ESSCIRC2008 Conference,

Edinburgh, Scotland UK, September 2008.


(P022) February 2013

Invited Plenary Panel Talk at ISSCCC2013 on Feb. 2013 on Image Sensors


(P023) June 2013

"The p-n-p-n Diode in Future Linear Motor Cars and in Modern Imagers"

IEEE Journal of Solid State Circuits, June issue, 2013.


(P024) July 2014

Japanese Patent Application JPA2014_135497

on "Digital Transformation Matrix for Fast Image Recognition System"

Japanese Patent Application written in Japanese, filed on July 1, 2014.


(P025) July 2014

"Design of Time to Frequency Domain Discrete Fourier Transfer Hardware Engine and its performance estimation"

Digest of Technical Papers at the Japan Electron Society sponsored

Integrated Circuit Workshop ( IEEJ ECT ) in Izumo, Japan, on July 4, 2014.


(P026) June 2015

"Digital Frequency Transformation Circuit for Time-wise Unequally Sampled Data"

THE INSTITUTE OF ELECTRONICS,INFORMATION AND COMMUNICATION ENGINEERS (IEICE) Technical Paper

on June 2015 in Kumamoto-city, Japan.


(P027) April 2017

IEEE_CoolChips_2017_Conference_Invited_Panel_Talk_on_Intelligent_Image_Sensor_Systems.pdf


(P028) October 2019

"Multichip CMOS Image Sensor Structure for Flash Image Acquisition"

IEEE International 3D Systems Integration Conference 2019 (3DIC2019),

Digest of Technical Papers, Sendai, Japan, Paper4017, October 2019.


(P029) March 2020

"Simulation and Device Characterization of the P+PN+P Junction Type Pinned Photodiode and Schottky Barrier Photodiode"

IEEE Electron Device and Manufacturing Technology Conference (EDTM2020),

Digestof Technical Papers, Penang Malaysia, Paper ID 3C4, March 2020.


(P030) August 2020

Japanese Patent Application JPA2020-131313

on "Double Junction Pinned Buried Photodiode Type splar Cell"

Japanese Patent Application written in Japanese,

filed on August 1, 2020.


(P031) June 2021

"Electrostatic and Dynamic Analysis of P+PNP Double Junction Type

and P+PNPN Triple Junction Type Pinned Photodiodes",

International Journal of Systems Science and Applied Mathematics, June 2,

doi: 10.11648/j.ijssam.20210602.13;

ISSN: 2575-5838 (Print);

ISSN: 2575-5803 (Online)

http://www.sciencepublishinggroup.com/journal/paperinfo?journalid=245&doi=10.11648/j.ijssam.20210602.13


(P032) Dec 9 2021 ICECET2021 Paper61
P2021_ICECET2021_Paper61_on_Pinned_Buried_PIN_Photodiode_Type_Solar_Cell.pdf

(P033) Dec 9 2021 ICECET2021 Paper75
P2021_ICECET2021_Paper75_on_Invention_and_Historical_Development_Efforts_of_Pinned_Burie_Photodiode.pdf

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Contributions to International Conferences and Organizations
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(C01) International Standardization Committee (1989-1992)
IEC TC47 Technical Committee Chair (1992)

(C02) JEDEC Memory Chips Standardization Committee (2000-2004)

(C03) IEEE EDS ICMTS International Program and Executive Committee (1991-2008)
General Chair (2003-2004);http://icmts.if.t.u-tokyo.ac.jp/home

(C04) IEEE SSS ISSCC Asian Program Committee (2001-2007)
ISSCC Asian Chair (2006-2007);http://isscc.org/

(C05) IEEE SSS ISSCC2008 International Program and Executive Committee (2007-2008)
International Program Chair (2007-2008); http://isscc.org/

(C06) IEEE Computer Society Cool Chips Organization Committee (2001-2010)
https://www.coolchips.org/

(C07) IEEE Computer Society Cool Chips Advisory Committee (2011-2021)
https://www.coolchips.org/

(C08) Visiting Professorship in Electric Engineering Department and
Applied Physics Department at California Institute of Technology,
Pasadena, califor, USA, 1998-1999;https://www.caltech.edu/

(C09) Professorship in Electircal Engineering Department at Gunma University,
Kiryu-city, Gunma-ken, Japan, 2001-2008;https://www.gunma-u.ac.jp/

(C10) Professorship in Information and Communication Tecnology Department
at Sojo University, Kumamoto-city, Japan, 2009-2017; https://www.sojo-u.ac.jp/

(C11) Artificial Intelligent Partner System (AIPS) Consortium,Kanagawa-ken NPO, Japan,
President and CEO (2008-2017); http://www.aiplab.com//

(C12) Society of Semiconductore Industry Experts of Japan ; http://www.ssis.or.jp/
currently also serving as the chairman of the SSIS Education Executive Committee.

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List of Realted PDF files decribing the works of Yoshiaki Hagiwara
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

(R01) Sony_vs_Loral_Patent_War_1_Reviews.pdf

(R02) Sony_vs_Loral_Patent_War_2_Supporting_Opinions.pdf

(R03) E-mail_Communication_on_Sony_Loral_Patent_War_1996.pdf

(R04) E-mail_communication_with_Albert_san_2018_07_10.pdf

(R05) HAD_sensor_NEC_SONY_Patent_War.pdf

(R06) JP1980_138026_NEC_Buried_Photodiode_Patent.pdf

(R07) JP1978-1971_Toshiba_Yamada_VOD_patent.pdf

(R08) Sony_vs_Loral_PAtent_War_13_pages.pdf

(R09) Sony_vs_Loral_Patent_War_53_pages.pdf

(R10) Image_Sensor_Story_by_Hagiwara.pdf

(R11) The_evidence_that_Hagiwara_is_the_inventor_of_Pinned_Photodiode_7_pages.pdf

(R12) Future_of_Image_Sensors_and_Solar_Cells.pdf

(R13) JP1975-127646_NPNP_triple_junction_Pinned_Photodiode_Patent_32_pages.pdf

(R14) The_First_Pinned_Photodiode_was_invented_in_1975_by_Yoshiaki_Hagiwar_at_Sony.pdf

(R15) JP1975-127647_NPN_double_junction_Pinned_Photodiode_Patent_22_pages.pdf

(R16) JP1975-134985_PNP_double_junction_Pinned_Photodiode_on_Nsub_Patent_7_pages.pdf

(R17) JP1977-126885_Elecric_Shutter_Clocking_Scheme_by_OFD_Punch_Thru_Action_13_pages.pdf

(R18) JP2014-135497_Digital_Transformation_Circuit_for_Image_Sensors_29_pages.pdf

(R19) JP2020_131313_on_Doubel_Junction_Pinned_Photodiode_Solar_Cell_65_Pages.pdf

(R20) P1978_Pinned_Photodiode_1978_Paper_by_Hagiwara_7_Pages.pdf

(R21) P1996_Pinned_Photodidoe_used_in_Sony_1980_FT_CCD_Image_Sensor_9_Pages.pdf

(R22) P2001_ESSCIRC2001_Micro-Electronics_for_Home_Entertainment_11_pages.pdf

(R23) P2008_ESSCIRC_2008_SOI_Design_in_Cell_Processor_and_Beyond_7_pages.pdf

(R24) P2013_ISSCC2013_Panel_Talk_25_pages.pdf

(R25) P2017_CoolChips_Panel_170419_29_pages.pdf

(R26) P2019_3DIC2019_Paper_on_3D_Pinned_Photodiode_6_pages.pdf

(R27) P2020_EDTM2020_PaperID_3C4_by_Hagiwara_4_pages.pdf

(R28) P2021_IJSSA2021_Paper_20210616_on_Electrostatic_and_Dynamic_Analysis_of_Pinned_Photodiodes.pdf

(R29) Buried_Photodiode_is_not_always_PPD_Hagiwara_Nov_2020.pdf

(R30) Caltech_1975_PhD_Thesis_Yoshiaki_Daimon_Hagihara.pdf

(R31) Difference_of_Buried_Photodiode_and_Pinned_Photodiode.pdf

(R32) E-mail_Communication_on_Sony_Loral_Patent_War_1996.pdf

(R33) E-mail_communication_with_Albert_and_Yoshi.pdf

(R34) E-mail_communication_with_Albert_san_2018_07_10.pdf

(R35) E-mail_communication_with_Albert_san_2018_07_10A.pdf

(R36) E-mail_communication_with_Albert_san_2018_07_10B.pdf

(R37) Evidence_that_Hagiwara_is_the_inventor_of_Pinned_Photodiode_2020_10_04a.pdf

(R38) Evidence_that_Hagiwara_is_the_inventor_of_Pinned_Photodiode_in_Japanese.pdf

*****************************************************
Please write me at hagiwara-yoshiaki@aiplab.com
Return to http://www.aiplab.com/
*****************************************************

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